Difference between revisions of "SIMD"
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==MMX== | ==MMX== | ||
MMX is a SIMD instruction introduced by Intel with the Pentium line of processors. It provides integer operations only and has a strong limitation in that it makes it difficult to work with integer and floating point data at the same time, since it reuses the IA-32 FPU registers. | MMX is a SIMD instruction introduced by Intel with the Pentium line of processors. It provides integer operations only and has a strong limitation in that it makes it difficult to work with integer and floating point data at the same time, since it reuses the IA-32 FPU registers. | ||
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==SSE== | ==SSE== | ||
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==SSE 3== | ==SSE 3== | ||
SSE 3 extends the SSE 2 command set by 13 instrucions for converting floating point numbers into integer numbers, for complex arithmetics, video encoding, image processing and thread communications. | SSE 3 extends the SSE 2 command set by 13 instrucions for converting floating point numbers into integer numbers, for complex arithmetics, video encoding, image processing and thread communications. | ||
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Revision as of 01:36, 7 August 2005
SIMD (Single Instruction, Multiple Data) is a set of operations for efficiently handling large amounts of data. It makes it possible to execute one command on a set of data instances instead of having the same command to be executed on each of the data instances.
First introduced in large-scale supercomputers SIMD instrucion sets have become popular in personal computing hardware, hence being mostly associated with these units. The most widely known SIMD instructions sets are AIMs (Apple-IBM-Motorola) AltiVec for the PowerPC, AMDs 3DNow! and Intels MMX and SSE sets in their various versions.
MMX
MMX is a SIMD instruction introduced by Intel with the Pentium line of processors. It provides integer operations only and has a strong limitation in that it makes it difficult to work with integer and floating point data at the same time, since it reuses the IA-32 FPU registers.
SSE
SSE is a set of instuctions optimized for handling floating point operations on a 128 bit level.
SSE 2
SSE 2 contains 144 new commands for Cache and Memory management and the 64 bit commands of the MMX set were improved and extended to 128 bit.
SSE 3
SSE 3 extends the SSE 2 command set by 13 instrucions for converting floating point numbers into integer numbers, for complex arithmetics, video encoding, image processing and thread communications.
