Difference between revisions of "Intel Celeron M"

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<div style="margin: 0; margin-right:10px; border: 1px solid #dfdfdf; padding: 0em 1em 1em 1em; background-color:#F8F8FF; align:right;">
 
<div style="margin: 0; margin-right:10px; border: 1px solid #dfdfdf; padding: 0em 1em 1em 1em; background-color:#F8F8FF; align:right;">
 
===Intel Celeron M ===
 
===Intel Celeron M ===
−
The Celeron M is a budget processor based on the Pentium M. Compared to the Pentium M it has only half the L2-Cache and lacks the [[SpeedStep]] feature.
+
The Celeron M is a budget processor based on the Pentium M. Compared to the Pentium M it has only half the L2-Cache and lacks the [[SpeedStep]] feature (excl. Banias family).
  
 
===Features===
 
===Features===
−
*800-1600 MHz tact
+
*800-1600 MHz tact  
−
*400 MHz FSB
+
*400 MHz FSB (Supports 533 MHz with CPU-Pin Hack and DDR2,see [http://www.overclockers.com/tips1204/ this] This puts the Clock speed in the 1066-2130 MHz range. Tested with a 370 Dothan)
 
*170 Million Transistors
 
*170 Million Transistors
 
*0.13&micro;m or 0.09&micro;m fabrication process
 
*0.13&micro;m or 0.09&micro;m fabrication process
 
*512 KB or 1 MB L2-Cache
 
*512 KB or 1 MB L2-Cache
−
*QuickStart, Deeper Sleep
+
*[[QuickStart and Deeper Sleep|QuickStart]], [[QuickStart and Deeper Sleep|Deeper Sleep]]
 
*[[SIMD|MMX]], [[SIMD|SSE]], [[SIMD|SSE2]] instruction sets
 
*[[SIMD|MMX]], [[SIMD|SSE]], [[SIMD|SSE2]] instruction sets
 
</div>
 
</div>
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==Available Types and ThinkPads featuring them==
 
==Available Types and ThinkPads featuring them==
 
{| border=1 cellspacing=0 cellpadding=2
 
{| border=1 cellspacing=0 cellpadding=2
−
! Nr. !! Frequency (MHz) !! L2-Cache (KB) !! Bus Speed (MHz) !! V-Core (V) !! TDP (W) !! ThinkPad Models
+
|- style="background:#ffdead;white-space:nowrap;"
 +
! Nr. !! Frequency (MHz) !! L2-Cache (KB) !! FSB (MHz) !! XD-Bit !! VCore (V) !! TDP (W) !! ThinkPad Models
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Penryn-3M) - Ultra Low Voltage
 
|-
 
|-
−
! colspan=7 | Celeron M (Dothan)
+
| 723 || 1200 || 1024 || 800 || &bull; || ? || ? || {{X200s}}
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Merom-L)
 
|-
 
|-
−
| 380 || 1600 || 1024 || 400 || 1.292 || 21.0 ||  
+
| 585 || 2167 || 1024 || 667 || &bull; || ? || ? || {{R400}}, {{SL400}}, {{SL500}}
 
|-
 
|-
−
| 370 || 1500 || 1024 || 400 || ... || 21.0 || {{R52}}
+
| 575 || 2000 || 1024 || 667 || &bull; || ? || ? || {{R400}}
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Dothan)
 
|-
 
|-
−
| 360J || 1400 || 1024 || 400 || ... || 21.0 ||  
+
| 380 || 1600 || 1024 || 400 || &bull; || 1.292 || 21.0 || {{R51e}}
 
|-
 
|-
−
| 360 || 1400 || 1024 || 400 || ... || 21.0 || {{R50e}}, {{R52}}
+
| 370 || 1500 || 1024 || 400 || &bull; || ... || 21.0 || {{R50e}}, {{R51e}}, {{R52}}, {{Z60m}}, {{Z60t}}
 
|-
 
|-
−
| 350J || 1300 || 1024 || 400 || ... || 21.0 ||  
+
| 360J || 1400 || 1024 || 400 || &bull; || ... || 21.0 || {{R50e}}, {{R51e}}, {{Z60m}}, {{Z60t}}
 
|-
 
|-
−
| 350 || 1300 || 1024 || 400 || ... || 21.0 || {{R50e}}, {{R51}}, {{R52}}
+
| 360 || 1400 || 1024 || 400 || || ... || 21.0 || {{R50e}}, {{R52}}
 
|-
 
|-
−
! colspan=7 | Celeron M (Dothan) - Ultra Low Voltage
+
| 350J || 1300 || 1024 || 400 || &bull; || ... || 21.0 ||
 
|-
 
|-
−
| 383 || 1000 || 1024 || 400 || 1.35 || 21.0 ||  
+
| 350 || 1300 || 1024 || 400 || || ... || 21.0 || {{R50e}}, {{R51}}, {{R52}}
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Dothan) - Ultra Low Voltage
 
|-
 
|-
−
| 373 || 1000 || 512 || 400 || 1.35 || 20.0 ||  
+
| 383 || 1000 || 1024 || 400 || || ... || ... ||  
 
|-
 
|-
−
| 353 || 900 || 512 || 400 || 1.35 || 19.0 ||  
+
| 373 || 1000 || 512 || 400 || || ... || ... ||  
 
|-
 
|-
−
! colspan=7 | Celeron M (Banias)
+
| 353 || 900 || 512 || 400 || || ... || ... ||
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Banias)
 
|-
 
|-
−
| 340 || 1500 || 512 || 400 || 1.35 || 21.0 || {{R50e}}, {{R51}}
+
| 340 || 1500 || 512 || 400 || || 1.35 || 21.0 || {{R50e}}, {{R51}}
 
|-
 
|-
−
| 330 || 1400 || 512 || 400 || 1.35 || 20.0 || {{R51}}
+
| 330 || 1400 || 512 || 400 || || 1.35 || 20.0 || {{R51}}
 
|-
 
|-
−
| 320 || 1300 || 512 || 400 || 1.35 || 19.0 || {{R50e}}, {{R51}}
+
| 320 || 1300 || 512 || 400 || || 1.35 || 19.0 || {{R50e}}, {{R51}}
 
|-
 
|-
−
| 310 || 1200 || 512 || 400 || 1.35 || 18.0 ||  
+
| 310 || 1200 || 512 || 400 || || 1.35 || 18.0 ||  
 
|-
 
|-
−
| || 800 || 512 || 400 || 1.0 || 7.0 ||  
+
| || 800 || 512 || 400 || || 1.0 || 7.0 ||  
 +
|- style="background:#efefef;"
 +
! colspan=8 | Celeron M (Banias) - Ultra Low Voltage
 
|-
 
|-
−
! colspan=7 | Celeron M (Banias) - Ultra Low Voltage
+
| 333 || 900 || 512 || 400 || || ... || ... ||  
−
|-
 
−
| 333 || 900 || 512 || 400 || 1.35 || 21.0 ||  
 
 
|}
 
|}
  
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The max. Core Temperature is 100&deg;C.
 
The max. Core Temperature is 100&deg;C.
  
−
==GCC Optimization Flags==
+
==GCC 3.3 Optimization Flags==
 +
 
 +
CHOST="i686-pc-linux-gnu"
 +
CFLAGS="-march=pentium3 -msse2 -O2 -pipe -fomit-frame-pointer"
 +
CXXFLAGS="${CFLAGS}"
 +
 
 +
 
 +
==GCC 3.4 and Later ==
 +
 
 +
CHOST="i686-pc-linux-gnu"
 +
CFLAGS="-O2 -march=pentium-m -pipe -fomit-frame-pointer"
 +
CXXFLAGS="${CFLAGS}"
 +
 
 +
Someone can expirence problems with GCC 3.4.5
 +
The solution can be
 +
 
 +
CFLAGS="-mcpu=i686 -O3 -pipe"
 +
 
 +
 
 +
==Speed Step==
 +
 
 +
For using the speed step with the celeron M you must add the module p4-clockmod.
 +
 
 +
==Kernel Options==
  
 +
When compiling the kernel choose the pentium-M processor type
  
−
[[Category:Components]]
+
[[Category:CPUs]]

Latest revision as of 15:48, 22 January 2021

Intel Celeron M

The Celeron M is a budget processor based on the Pentium M. Compared to the Pentium M it has only half the L2-Cache and lacks the SpeedStep feature (excl. Banias family).

Features

  • 800-1600 MHz tact
  • 400 MHz FSB (Supports 533 MHz with CPU-Pin Hack and DDR2,see this This puts the Clock speed in the 1066-2130 MHz range. Tested with a 370 Dothan)
  • 170 Million Transistors
  • 0.13µm or 0.09µm fabrication process
  • 512 KB or 1 MB L2-Cache
  • QuickStart, Deeper Sleep
  • MMX, SSE, SSE2 instruction sets

Available Types and ThinkPads featuring them

Nr. Frequency (MHz) L2-Cache (KB) FSB (MHz) XD-Bit VCore (V) TDP (W) ThinkPad Models
Celeron M (Penryn-3M) - Ultra Low Voltage
723 1200 1024 800 • ? ? X200s
Celeron M (Merom-L)
585 2167 1024 667 • ? ? R400, SL400, SL500
575 2000 1024 667 • ? ? R400
Celeron M (Dothan)
380 1600 1024 400 • 1.292 21.0 R51e
370 1500 1024 400 • ... 21.0 R50e, R51e, R52, Z60m, Z60t
360J 1400 1024 400 • ... 21.0 R50e, R51e, Z60m, Z60t
360 1400 1024 400 ... 21.0 R50e, R52
350J 1300 1024 400 • ... 21.0
350 1300 1024 400 ... 21.0 R50e, R51, R52
Celeron M (Dothan) - Ultra Low Voltage
383 1000 1024 400 ... ...
373 1000 512 400 ... ...
353 900 512 400 ... ...
Celeron M (Banias)
340 1500 512 400 1.35 21.0 R50e, R51
330 1400 512 400 1.35 20.0 R51
320 1300 512 400 1.35 19.0 R50e, R51
310 1200 512 400 1.35 18.0
800 512 400 1.0 7.0
Celeron M (Banias) - Ultra Low Voltage
333 900 512 400 ... ...

Thermal Specifications

The max. Core Temperature is 100°C.

GCC 3.3 Optimization Flags

CHOST="i686-pc-linux-gnu" CFLAGS="-march=pentium3 -msse2 -O2 -pipe -fomit-frame-pointer" CXXFLAGS="${CFLAGS}"


GCC 3.4 and Later

CHOST="i686-pc-linux-gnu" CFLAGS="-O2 -march=pentium-m -pipe -fomit-frame-pointer" CXXFLAGS="${CFLAGS}"

Someone can expirence problems with GCC 3.4.5 The solution can be

CFLAGS="-mcpu=i686 -O3 -pipe"


Speed Step

For using the speed step with the celeron M you must add the module p4-clockmod.

Kernel Options

When compiling the kernel choose the pentium-M processor type

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