Difference between revisions of "Intel Pentium M (Dothan)"

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<div style="margin: 0; margin-right:10px; border: 1px solid #dfdfdf; padding: 0em 1em 1em 1em; background-color:#F8F8FF; align:right;">
 
<div style="margin: 0; margin-right:10px; border: 1px solid #dfdfdf; padding: 0em 1em 1em 1em; background-color:#F8F8FF; align:right;">
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===Intel Mobile Pentium M (Dothan)===
 
−
The Dothan Pentium M is the second generation Pentium M processor. The fabrication process was reduced to 0.09&micro;m and the L2-Cache was doubled to 2 MB. A second generation of Dothan Pentium M processors features a 533 MHz FSB and accompanies the Sonoma Centrino platform.
 
  
−
===Features===
+
The Pentium M &quot;Dothan&quot; is the second generation Pentium M processor. The fabrication process was reduced to 90 nm and the L2-Cache was doubled to 2 MB. The second revision of Dothan Pentium M processors features a 533 MHz FSB and accompanies the Sonoma [[Centrino]] platform.
−
*1.0-2.26 GHz tact
+
 
 +
==Features==
 +
*1.0 - 2.26 GHz clock speed
 
*400/533 MHz FSB
 
*400/533 MHz FSB
−
*170 Million Transistors
+
*140 Million Transistors
−
*0.09&micro;m fabrication process
+
*90 nm fabrication process
 
*2 MB L2-Cache
 
*2 MB L2-Cache
−
*[[SpeedStep|(Enhanced) EIST]], XD-Bit
+
*[[SpeedStep|(Enhanced) EIST]], [[QuickStart and Deeper Sleep|Deeper Sleep]]
 +
* XD-Bit (on most models)
 
*[[SIMD|MMX]], [[SIMD|SSE]], [[SIMD|SSE2]] instruction sets
 
*[[SIMD|MMX]], [[SIMD|SSE]], [[SIMD|SSE2]] instruction sets
 
</div>
 
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! !!max. !! min. !! !! !! high !! low !! high !! low !!  
 
! !!max. !! min. !! !! !! high !! low !! high !! low !!  
 
|- style="background:#efefef;"
 
|- style="background:#efefef;"
−
! colspan=10 colspan="3" | Mobile Pentium M
+
! colspan="10" | Pentium M
 
|-
 
|-
 
| 780 || 2266 || 800 || 533 || &bull; || 1.372 || ... || 27 || 11 || {{R52}}, {{T43}}. {{T43p}}
 
| 780 || 2266 || 800 || 533 || &bull; || 1.372 || ... || 27 || 11 || {{R52}}, {{T43}}. {{T43p}}
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| 765 || 2100 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42p}}
 
| 765 || 2100 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42p}}
 
|-
 
|-
−
| 760 || 2000 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R52}}, {{T43}}, {{T43p}}, {{Z60m}}, {{Z60t}}
+
| 760 || 2000 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R51e}}, {{R52}}, {{T43}}, {{T43p}}, {{Z60m}}, {{Z60t}}
 
|-
 
|-
 
| 755 || 2000 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42p}}, {{X32}}
 
| 755 || 2000 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42p}}, {{X32}}
 
|-
 
|-
−
| 750 || 1866 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R52}}, {{T43}}, {{T43p}}, {{Z60m}}, {{Z60t}}
+
| 750 || 1866 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R51e}}, {{R52}}, {{T43}}, {{T43p}}, {{Z60m}}, {{Z60t}}
 
|-
 
|-
 
| 745 || 1800 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42}}, {{T42p}}, {{X32}}, {{R51}}
 
| 745 || 1800 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{T42}}, {{T42p}}, {{X32}}, {{R51}}
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| 740 || 1733 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R51e}}, {{R52}}, {{T43}}, {{Z60m}}, {{Z60t}}
 
| 740 || 1733 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R51e}}, {{R52}}, {{T43}}, {{Z60m}}, {{Z60t}}
 
|-
 
|-
−
| 735 || 1700 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R51}}, {{T42}}, {{X32}}
+
| 735 || 1700 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R50e}}, {{R51}}, {{T42}}, {{X32}}
 
|-
 
|-
−
| 730 || 1600 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{T43}}
+
| 730 || 1600 || 800 || 533 || &bull; || 1.372 || 0.988 || 27 || 11 || {{R51e}}, {{T43}}
 
|-
 
|-
 
| 725a || 1600 || 600 || 400 || || ... || ... || ... || ... || {{R50e}}, {{R51}}, {{R52}}
 
| 725a || 1600 || 600 || 400 || || ... || ... || ... || ... || {{R50e}}, {{R51}}, {{R52}}
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| 725 || 1600 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R50e}}, {{R51}}, {{T42}}, {{X32}}
 
| 725 || 1600 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R50e}}, {{R51}}, {{T42}}, {{X32}}
 
|-
 
|-
−
| 715a || 1500 || 600 || 400 || || ... || ... || ... || ... || {{R51}}  
+
| 715a || 1500 || 600 || 400 || || ... || ... || ... || ... || {{R50e}}, {{R51}}  
 
|-
 
|-
 
| 715 || 1500 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R50e}}, {{R51}}
 
| 715 || 1500 || 600 || 400 || || 1.34 || 0.988 || 21 || 8 || {{R50e}}, {{R51}}
 
|-
 
|-
−
| 710 || 1400 || ... || 400 || || ... || ... || ... || ... || {{R51}}
+
| 710 || 1400 || ... || 400 || || ... || ... || ... || ... || {{R50e}}, {{R51}}
 
|- style="background:#efefef;"
 
|- style="background:#efefef;"
−
! colspan=10 | Mobile Pentium M (Low Voltage)
+
! colspan="10" | Pentium M (Low Voltage)
 
|-
 
|-
−
| 778 || 1600 || ... || 400 || &bull; || 1.116 || ... || 10 || ... || {{X40}}, {{X41}}
+
| 778 || 1600 || ... || 400 || &bull; || 1.116 || ... || 10 || ... || {{X40}}, {{X41}}, {{X41T}}
 
|-
 
|-
−
| 758 || 1500 || 600 || 400 || &bull; || 1.116 || 0.988 || 10 || ... || {{X40}}, {{X41}}, {{X41T}}
+
| 758 || 1500 || 600 || 400 || &bull; || 1.116 || 0.988 || 7.5 || ... || {{X40}}, {{X41}}, {{X41T}}
 
|-
 
|-
 
| 738 || 1400 || ... || 400 || || 1.116 || 0.988 || 10 || ... || {{X40}}
 
| 738 || 1400 || ... || 400 || || 1.116 || 0.988 || 10 || ... || {{X40}}
 
|- style="background:#efefef;"
 
|- style="background:#efefef;"
−
! colspan=10 | Mobile Pentium M (Ultra Low Voltage)
+
! colspan="10" | Pentium M (Ultra Low Voltage)
 +
|-
 +
| 773 || 1300 || ... || 400 || &bull; || ... || ... || ... || ... ||
 
|-
 
|-
 
| 753 || 1200 || ... || 400 || &bull; || 0.940 || 0.812 || 5 || ... || {{X41T}}
 
| 753 || 1200 || ... || 400 || &bull; || 0.940 || 0.812 || 5 || ... || {{X41T}}
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==GCC Optimization Flags==
 
==GCC Optimization Flags==
−
You should use the following for GCC version 3.4.4 and later if you have a Pentium M
+
You should use the following for GCC version 3.4.4 and later if you have a Pentium M:
−
  -Os -march=pentium-m -fomit-frame-pointer -pipe
+
  -Os -march=pentium-m -pipe
 +
 
 +
For GCC version 3.3.5 and earlier use the following:
 +
-Os -march=pentium3 -msse2 -pipe
 +
 
 +
Also, if you don't plan to use debugging information, then you can safely add the following to either of the above for a possible performance improvement:
 +
-fomit-frame-pointer
 +
 
 +
==Physical Address Extension (PAE)==
 +
Most modern Linux distributions use [[PAE]] kernels which will fail to boot if this feature is not present in the CPU. The Dothan core is said to support PAE even though it doesn't report the feature to the operating system. As a workaround, [[Kernel parameters|kernel parameter]] <code>forcepae</code> can be used to successfully use PAE-kernels on any Dothan core.
 +
 
 +
All second generation Dothan models with a 533 MHz FSB and some newer model first generation Dothan cores with a 400 MHz FSB do report PAE and NX in their CPU flags. All others must use the workaround.
  
−
For GCC version 3.3.5 and earlier use
+
Note: As a direct result, when the CPU flag PAE and NX (No eXecute, the XD-Bit) is not reported, 32-Bit-Windows starting with Windows 8 will also not run (Windows doesn't have a forcepae option), leaving 32-Bit Windows 7 the last supported Windows operating system on Pentium M CPUs before the second generation Dothan core.
−
-Os -march=pentium4 -fomit-frame-pointer -pipe
 
  
 
==See also==
 
==See also==
 
* [[Intel Pentium M (Banias)]]
 
* [[Intel Pentium M (Banias)]]
 +
* [[Intel Core Duo (Yonah)]]
 
* [[Pentium M undervolting and underclocking]]
 
* [[Pentium M undervolting and underclocking]]
  
−
[[Category:Components]]
+
[[Category:CPUs]]

Latest revision as of 15:54, 22 January 2021

The Pentium M "Dothan" is the second generation Pentium M processor. The fabrication process was reduced to 90 nm and the L2-Cache was doubled to 2 MB. The second revision of Dothan Pentium M processors features a 533 MHz FSB and accompanies the Sonoma Centrino platform.

Features

  • 1.0 - 2.26 GHz clock speed
  • 400/533 MHz FSB
  • 140 Million Transistors
  • 90 nm fabrication process
  • 2 MB L2-Cache
  • (Enhanced) EIST, Deeper Sleep
  • XD-Bit (on most models)
  • MMX, SSE, SSE2 instruction sets

Available Types and ThinkPads featuring them

Nr. Frequency (MHz) FSB (MHz) XD-Bit core Voltage (V) TDP (W) ThinkPad Models
max. min. high low high low
Pentium M
780 2266 800 533 • 1.372 ... 27 11 R52, T43. T43p
770 2133 800 533 • 1.372 0.988 27 11 R52, T43, T43p
765 2100 600 400 1.34 0.988 21 8 T42p
760 2000 800 533 • 1.372 0.988 27 11 R51e, R52, T43, T43p, Z60m, Z60t
755 2000 600 400 1.34 0.988 21 8 T42p, X32
750 1866 800 533 • 1.372 0.988 27 11 R51e, R52, T43, T43p, Z60m, Z60t
745 1800 600 400 1.34 0.988 21 8 T42, T42p, X32, R51
740 1733 800 533 • 1.372 0.988 27 11 R51e, R52, T43, Z60m, Z60t
735 1700 600 400 1.34 0.988 21 8 R50e, R51, T42, X32
730 1600 800 533 • 1.372 0.988 27 11 R51e, T43
725a 1600 600 400 ... ... ... ... R50e, R51, R52
725 1600 600 400 1.34 0.988 21 8 R50e, R51, T42, X32
715a 1500 600 400 ... ... ... ... R50e, R51
715 1500 600 400 1.34 0.988 21 8 R50e, R51
710 1400 ... 400 ... ... ... ... R50e, R51
Pentium M (Low Voltage)
778 1600 ... 400 • 1.116 ... 10 ... X40, X41, X41 Tablet
758 1500 600 400 • 1.116 0.988 7.5 ... X40, X41, X41 Tablet
738 1400 ... 400 1.116 0.988 10 ... X40
Pentium M (Ultra Low Voltage)
773 1300 ... 400 • ... ... ... ...
753 1200 ... 400 • 0.940 0.812 5 ... X41 Tablet
733J 1100 ... 400 • .... ... ... ...
733 1100 ... 400 0.940 0.812 5 ... X40
723 1000 ... 400 0.940 0.812 5 ...

Thermal Specifications

The max. Core Temperature is 100°C.

GCC Optimization Flags

You should use the following for GCC version 3.4.4 and later if you have a Pentium M: 

-Os -march=pentium-m -pipe

For GCC version 3.3.5 and earlier use the following: 

-Os -march=pentium3 -msse2 -pipe

Also, if you don't plan to use debugging information, then you can safely add the following to either of the above for a possible performance improvement: 

-fomit-frame-pointer

Physical Address Extension (PAE)

Most modern Linux distributions use PAE kernels which will fail to boot if this feature is not present in the CPU. The Dothan core is said to support PAE even though it doesn't report the feature to the operating system. As a workaround, kernel parameter forcepae can be used to successfully use PAE-kernels on any Dothan core.

All second generation Dothan models with a 533 MHz FSB and some newer model first generation Dothan cores with a 400 MHz FSB do report PAE and NX in their CPU flags. All others must use the workaround.

Note: As a direct result, when the CPU flag PAE and NX (No eXecute, the XD-Bit) is not reported, 32-Bit-Windows starting with Windows 8 will also not run (Windows doesn't have a forcepae option), leaving 32-Bit Windows 7 the last supported Windows operating system on Pentium M CPUs before the second generation Dothan core.

See also

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